diff options
| author | Alejandro Soto <alejandro@34project.org> | 2023-10-26 01:33:00 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2023-10-26 01:33:00 -0600 |
| commit | 986863efed48dfba23907400beb7e5f025b75b50 (patch) | |
| tree | e0ff07cc351943639af64b4b6109e6e2c027f9e7 /platform.qsys | |
| parent | d6c2fd1dcee4c4e413faebca2bd2cd2513132f7d (diff) | |
rtl/gfx: synchronize clock with SDRAM
Diffstat (limited to 'platform.qsys')
| -rw-r--r-- | platform.qsys | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/platform.qsys b/platform.qsys index f0724b0..21cc3e9 100644 --- a/platform.qsys +++ b/platform.qsys @@ -1491,11 +1491,6 @@ <parameter name="baseAddress" value="0x30020000" /> <parameter name="defaultConnection" value="false" /> </connection> - <connection kind="avalon" version="20.1" start="mm_bridge.m0" end="vram.s1"> - <parameter name="arbitrationPriority" value="1" /> - <parameter name="baseAddress" value="0x38000000" /> - <parameter name="defaultConnection" value="false" /> - </connection> <connection kind="avalon" version="20.1" @@ -1692,7 +1687,6 @@ end="hps_0.f2h_sdram0_clock" /> <connection kind="clock" version="20.1" start="pll_0.outclk1" end="mm_bridge.clk" /> <connection kind="clock" version="20.1" start="pll_0.outclk1" end="smp_0.clock" /> - <connection kind="clock" version="20.1" start="pll_0.outclk1" end="gfx_0.clock" /> <connection kind="clock" version="20.1" @@ -1757,6 +1751,11 @@ kind="clock" version="20.1" start="sys_sdram_pll_0.sys_clk" + end="gfx_0.clock" /> + <connection + kind="clock" + version="20.1" + start="sys_sdram_pll_0.sys_clk" end="pixfifo.clock_stream_in" /> <connection kind="clock" version="20.1" start="video_pll_0.vga_clk" end="vga.clk" /> <connection |