diff options
| author | Alejandro Soto <alejandro@34project.org> | 2023-09-29 19:50:01 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2023-09-29 20:51:28 -0600 |
| commit | bc98bc905c2e796f0d587719196f7e4bf344510a (patch) | |
| tree | f5859d0b2f4fd5ab8c785a7cbaffa54dc81bc797 /core_hw.tcl | |
| parent | f06c23ac1327850eeeb390e155bfc6330d302a77 (diff) | |
platform: add CPUs and caches to qsys
Diffstat (limited to '')
| -rw-r--r-- | core_hw.tcl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/core_hw.tcl b/core_hw.tcl index 852e6c5..93b6def 100644 --- a/core_hw.tcl +++ b/core_hw.tcl @@ -66,7 +66,7 @@ add_fileset_file writeback.sv SYSTEM_VERILOG PATH rtl/core/control/writeback.sv add_fileset_file ldst.sv SYSTEM_VERILOG PATH rtl/core/control/ldst/ldst.sv add_fileset_file pop.sv SYSTEM_VERILOG PATH rtl/core/control/ldst/pop.sv add_fileset_file sizes.sv SYSTEM_VERILOG PATH rtl/core/control/ldst/sizes.sv -add_fileset_file cache.sv SYSTEM_VERILOG PATH rtl/core/cp15/cache.sv +add_fileset_file cache_ops.sv SYSTEM_VERILOG PATH rtl/core/cp15/cache_ops.sv add_fileset_file cache_lockdown.sv SYSTEM_VERILOG PATH rtl/core/cp15/cache_lockdown.sv add_fileset_file cp15.sv SYSTEM_VERILOG PATH rtl/core/cp15/cp15.sv add_fileset_file cpuid.sv SYSTEM_VERILOG PATH rtl/core/cp15/cpuid.sv |