diff options
| author | Alejandro Soto <alejandro@34project.org> | 2023-09-30 00:07:20 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2023-09-30 01:20:48 -0600 |
| commit | d1b10aa380578b5af20081dd37f2d36ec111cbd2 (patch) | |
| tree | e28ea62a6d95514e0a89e4fa8dd88eb9f37b73c1 /conspiracion.qsf | |
| parent | 1c9c08d72f32265501f1f14ad8a0d1e0b2b8850f (diff) | |
platform: implement SMP controller
Diffstat (limited to 'conspiracion.qsf')
| -rw-r--r-- | conspiracion.qsf | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/conspiracion.qsf b/conspiracion.qsf index c833c4b..8a8ff81 100644 --- a/conspiracion.qsf +++ b/conspiracion.qsf @@ -109,7 +109,6 @@ set_global_assignment -name ECO_REGENERATE_REPORT ON set_location_assignment PIN_AF14 -to clk_clk set_location_assignment PIN_AB12 -to rst_n -set_location_assignment PIN_AC12 -to halt set_location_assignment PIN_V16 -to pio_leds[0] set_location_assignment PIN_W16 -to pio_leds[1] @@ -316,4 +315,6 @@ set_global_assignment -name SIGNALTAP_FILE bus_test.stp set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (SystemVerilog)" set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "SYSTEMVERILOG HDL" -section_id eda_simulation + + set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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