From d1b10aa380578b5af20081dd37f2d36ec111cbd2 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sat, 30 Sep 2023 00:07:20 -0600 Subject: platform: implement SMP controller --- conspiracion.qsf | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'conspiracion.qsf') diff --git a/conspiracion.qsf b/conspiracion.qsf index c833c4b..8a8ff81 100644 --- a/conspiracion.qsf +++ b/conspiracion.qsf @@ -109,7 +109,6 @@ set_global_assignment -name ECO_REGENERATE_REPORT ON set_location_assignment PIN_AF14 -to clk_clk set_location_assignment PIN_AB12 -to rst_n -set_location_assignment PIN_AC12 -to halt set_location_assignment PIN_V16 -to pio_leds[0] set_location_assignment PIN_W16 -to pio_leds[1] @@ -316,4 +315,6 @@ set_global_assignment -name SIGNALTAP_FILE bus_test.stp set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (SystemVerilog)" set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "SYSTEMVERILOG HDL" -section_id eda_simulation + + set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file -- cgit v1.2.3