Implement multiplication decode

5 files changed, 86 insertions, 15 deletions

diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv
index 266832f..517c8de 100644
--- a/rtl/core/arm810.sv
+++ b/rtl/core/arm810.sv
@@ -34,6 +34,7 @@ module arm810
 	snd_decode dec_snd;
 	data_decode dec_data;
 	ldst_decode dec_ldst;
+	mul_decode dec_mul;
 
 	core_decode decode
 	(
@@ -42,6 +43,7 @@ module arm810
 		.snd_ctrl(dec_snd),
 		.data_ctrl(dec_data),
 		.ldst_ctrl(dec_ldst),
+		.mul_ctrl(dec_mul),
 		.*
 	);
 
diff --git a/rtl/core/decode/decode.sv b/rtl/core/decode/decode.sv
index 2740b70..f5668c1 100644
--- a/rtl/core/decode/decode.sv
+++ b/rtl/core/decode/decode.sv
@@ -10,7 +10,8 @@ module core_decode
 	output branch_decode   branch_ctrl,
 	output snd_decode      snd_ctrl,
 	output data_decode     data_ctrl,
-	output ldst_decode     ldst_ctrl
+	output ldst_decode     ldst_ctrl,
+	output mul_decode      mul_ctrl
 );
 
 	logic execute, undefined, conditional, writeback, update_flags, branch;
@@ -115,6 +116,19 @@ module core_decode
 		.alu(data_ldst)
 	);
 
+	logic mul_update_flags;
+	reg_num mul_rd, mul_rs, mul_rm;
+
+	core_decode_mul group_mul
+	(
+		.decode(mul_ctrl),
+		.rd(mul_rd),
+		.rs(mul_rs),
+		.rm(mul_rm),
+		.update_flags(mul_update_flags),
+		.*
+	);
+
 	always_comb begin
 		branch = 0;
 		writeback = 0;
@@ -153,6 +167,20 @@ module core_decode
 				end
 			end
 
+			`GROUP_MUL: begin
+				mul_ctrl.enable = 1;
+
+				data_ctrl.rd = mul_rd;
+				data_ctrl.rn = mul_rs;
+
+				snd_ctrl.is_imm = 0;
+				snd_ctrl.r = mul_rm;
+				snd_ctrl.shift_by_reg = 0;
+
+				writeback = 1;
+				update_flags = mul_update_flags;
+			end
+
 			`GROUP_ALU: begin
 				snd_is_imm = data_is_imm;
 				snd_ror_if_imm = 1;
@@ -167,9 +195,6 @@ module core_decode
 				undefined = undefined | snd_undefined;
 			end
 
-			/*`INSN_MUL: ;
-			`GROUP_BIGMUL: ;*/
-
 			`GROUP_LDST_SINGLE_IMM, `GROUP_LDST_SINGLE_REG: begin
 				snd_is_imm = ldst_single_is_imm;
 				snd_ror_if_imm = 0;
diff --git a/rtl/core/decode/isa.sv b/rtl/core/decode/isa.sv
index 98d338e..3d978a9 100644
--- a/rtl/core/decode/isa.sv
+++ b/rtl/core/decode/isa.sv
@@ -86,17 +86,16 @@
 `define INSN_SMULL 28'b0000110_?_????_????_????_1001_????
 `define INSN_SMLAL 28'b0000111_?_????_????_????_1001_????
 
-// No incluye INSN_MUL por el SBZ del medio
-`define GROUP_BIGMUL 28'b0000???_?_????_????_????_1001_????
-
-`define FIELD_MUL_LONG      [23]
-`define FIELD_MUL_SIGNED    [22]
-`define FIELD_MUL_ACC       [21]
-`define FIELD_MUL_SET_FLAGS [20]
-`define FIELD_MUL_RD        [19:16]
-`define FIELD_MUL_RN        [15:12]
-`define FIELD_MUL_RS        [11:8]
-`define FIELD_MUL_RM        [3:0]
+`define GROUP_MUL `INSN_MUL, `INSN_MLA, `INSN_UMULL, `INSN_UMLAL, `INSN_SMULL, `INSN_SMLAL
+
+`define FIELD_MUL_LONG   [23]
+`define FIELD_MUL_SIGNED [22]
+`define FIELD_MUL_ACC    [21]
+`define FIELD_MUL_S      [20]
+`define FIELD_MUL_RD     [19:16]
+`define FIELD_MUL_RN     [15:12]
+`define FIELD_MUL_RS     [11:8]
+`define FIELD_MUL_RM     [3:0]
 
 // Instrucciones de load/store
 
diff --git a/rtl/core/decode/mul.sv b/rtl/core/decode/mul.sv
new file mode 100644
index 0000000..f67435c
--- /dev/null
+++ b/rtl/core/decode/mul.sv
@@ -0,0 +1,34 @@
+`include "core/decode/isa.sv"
+`include "core/uarch.sv"
+
+module core_decode_mul
+(
+	input  word       insn,
+
+	output mul_decode decode,
+	output reg_num    rd,
+	                  rs,
+	                  rm,
+	output logic      update_flags
+);
+
+	logic long_mul;
+	reg_num short_rd, rn;
+
+	assign rd = long_mul ? rn : short_rd;
+	assign rs = insn `FIELD_MUL_RS;
+	assign rm = insn `FIELD_MUL_RM;
+	assign update_flags = insn `FIELD_MUL_S;
+
+	assign decode.enable = 0;
+	assign decode.add = insn `FIELD_MUL_ACC;
+	assign decode.long_mul = long_mul;
+	assign decode.signed_mul = insn `FIELD_MUL_SIGNED;
+	assign decode.r_add_lo = long_mul ? rn : short_rd;
+	assign decode.r_add_hi = short_rd;
+
+	assign long_mul = insn `FIELD_MUL_LONG;
+	assign short_rd = insn `FIELD_MUL_RD;
+	assign rn = insn `FIELD_MUL_RN;
+
+endmodule
diff --git a/rtl/core/uarch.sv b/rtl/core/uarch.sv
index 0c46dc7..bd4d659 100644
--- a/rtl/core/uarch.sv
+++ b/rtl/core/uarch.sv
@@ -123,6 +123,17 @@ typedef struct packed
 	reg_list    regs;
 } ldst_decode;
 
+typedef struct packed
+{
+	reg_num r_add_lo,
+	        r_add_hi; // También es destino cuando mul_decode.long
+
+	logic   enable,
+	        signed_mul,
+	        long_mul,
+	        add;
+} mul_decode;
+
 typedef enum
 {
 	ISSUE,