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| author | Alejandro Soto <alejandro@34project.org> | 2023-09-29 05:34:27 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2023-09-29 05:34:27 -0600 |
| commit | f06c23ac1327850eeeb390e155bfc6330d302a77 (patch) | |
| tree | 5e438c614d9e399c4d30c25b297b7f88f91befb6 | |
| parent | 231f61c7a07c41ff5b66aff400e7022310e6ec8b (diff) | |
qsf: enable ModelSim-Altera
| -rw-r--r-- | conspiracion.qsf | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/conspiracion.qsf b/conspiracion.qsf index 56cb0ff..c833c4b 100644 --- a/conspiracion.qsf +++ b/conspiracion.qsf @@ -314,4 +314,6 @@ set_global_assignment -name SIGNALTAP_FILE bus_test.stp +set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (SystemVerilog)" +set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "SYSTEMVERILOG HDL" -section_id eda_simulation set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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