diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-11-02 23:51:35 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-11-02 23:51:35 -0600 |
| commit | 64d84527cd71c3f96018df8831dcba38623d2e93 (patch) | |
| tree | 3791e5d1c06603fb111e076884b53acaaa12f6a4 | |
| parent | abe3a7da04a3703bd504b5ed2e13ecc79dff4bd0 (diff) | |
Use PLL output as CPU clock
| -rw-r--r-- | conspiracion.sdc | 2 | ||||
| -rw-r--r-- | rtl/core/arm810.sv | 1 | ||||
| -rw-r--r-- | rtl/top/conspiracion.sv | 5 |
3 files changed, 5 insertions, 3 deletions
diff --git a/conspiracion.sdc b/conspiracion.sdc index 6230720..66d23f5 100644 --- a/conspiracion.sdc +++ b/conspiracion.sdc @@ -1,3 +1,3 @@ -create_clock -period 10 -name clk_clk [get_ports clk_clk] +create_clock -period 20 -name clk_clk [get_ports clk_clk] derive_pll_clocks derive_clock_uncertainty diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv index 71233a3..3bc2769 100644 --- a/rtl/core/arm810.sv +++ b/rtl/core/arm810.sv @@ -3,6 +3,7 @@ module arm810 ( input logic clk, + irq, output ptr bus_addr, output logic bus_start, diff --git a/rtl/top/conspiracion.sv b/rtl/top/conspiracion.sv index 41b614f..8b5bdfa 100644 --- a/rtl/top/conspiracion.sv +++ b/rtl/top/conspiracion.sv @@ -39,13 +39,14 @@ module conspiracion arm810 core ( - .clk(clk_clk), + .clk(cpu_clk), .bus_addr(addr), .bus_data_rd(data_rd), .bus_data_wr(data_wr), .bus_ready(ready), .bus_write(write), - .bus_start(start) + .bus_start(start), + .* ); //TODO: pio_0_external_connection_export, |