summaryrefslogtreecommitdiff
path: root/tb/avalon.impl.hpp
blob: 60f36a446127b2fbfcf5d4fbec88f6bcb6641ec8 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
#ifndef AVALON_IMPL_HPP
#define AVALON_IMPL_HPP

#include <cassert>
#include <cstdio>

namespace taller::avalon
{
	template<class Platform>
	inline interconnect<Platform>::interconnect(Platform &plat) noexcept
	: plat(plat)
	{}

	template<class Platform>
	void interconnect<Platform>::attach(slave &dev)
	{
		auto base = dev.base_address();
		auto mask = dev.address_mask();
		assert((base & mask) == base);

		devices.push_back(binding { base, mask, dev });
	}

	template<class Platform>
	void interconnect<Platform>::tick(bool clk)
	{
		if(active)
		{
			assert(avl_address == plat.avl_address);
			assert(avl_read == plat.avl_read);
			assert(avl_write == plat.avl_write);
			assert(avl_writedata == plat.avl_writedata);
			assert(avl_byteenable == plat.avl_byteenable);
		}

		if(!clk)
		{
			if(!plat.avl_waitrequest)
			{
				active = nullptr;
			}

			return;
		} else if(!active)
		{
			avl_address = plat.avl_address;
			avl_read = plat.avl_read;
			avl_write = plat.avl_write;
			avl_writedata = plat.avl_writedata;
			avl_byteenable = plat.avl_byteenable;

			assert(!avl_read || !avl_write);

			if(avl_address & 0b11)
			{
				fprintf(stderr, "[avl] unaligned address: 0x%08x\n", avl_address);
				assert(false);
			}

			for(auto &binding : devices)
			{
				if((avl_address & binding.mask) == binding.base)
				{
					active = &binding.dev;
					break;
				}
			}

			if(!active)
			{
				const char *op = avl_read ? "read" : "write";
				fprintf(stderr, "[avl] attempt to %s memory hole at 0x%08x\n", op, avl_address);
				assert(false);
			}
		}

		auto pos = (avl_address & ~active->address_mask()) >> 2;

		if(avl_read)
		{
			plat.avl_waitrequest = !active->read(pos, plat.avl_readdata);
		} else if(avl_write)
		{
			plat.avl_waitrequest = !active->write(pos, avl_writedata, avl_byteenable);
		}
	}
}

#endif