blob: e8f4832a9b4a5cb8469723fce59093c0574d4f04 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
|
`include "core/uarch.sv"
module core_fetch
#(parameter PREFETCH_ORDER=2)
(
input logic clk,
stall,
flush,
fetched,
input word fetch_data,
input ptr target,
output logic fetch,
output word insn,
output ptr insn_pc,
addr
);
ptr next_pc;
core_prefetch #(.ORDER(PREFETCH_ORDER)) prefetch
(
.*
);
always_ff @(posedge clk)
if(flush)
addr <= next_pc;
else if(fetched)
addr <= addr + 1;
initial addr = 0;
endmodule
|
