From 6d458ad9629268ecfc69881b4fb10dca0498fbd0 Mon Sep 17 00:00:00 2001
From: Alejandro Soto <alejandro@34project.org>
Date: Sun, 18 Dec 2022 00:22:13 -0600
Subject: Fix datapath of shifter carry-out during adc/sbc/rsc

---
 tb/sim/shifts.S  | 3 +++
 tb/sim/shifts.py | 1 +
 2 files changed, 4 insertions(+)

(limited to 'tb')

diff --git a/tb/sim/shifts.S b/tb/sim/shifts.S
index 6209157..ba464f7 100644
--- a/tb/sim/shifts.S
+++ b/tb/sim/shifts.S
@@ -17,4 +17,7 @@ reset:
 	ldr r4, =(512 << 20)
 	ldr r5, =#60
 	lsr r4, r4, r5
+	mov r5, #0
+	ldr r12, =-123456
+	adc r5, r5, r12, asr #18
 	mov pc, lr
diff --git a/tb/sim/shifts.py b/tb/sim/shifts.py
index 9923124..11413e5 100644
--- a/tb/sim/shifts.py
+++ b/tb/sim/shifts.py
@@ -3,3 +3,4 @@ def final():
 	assert_reg(r2, 0x00015000)
 	assert_reg(r3, 0xaaa9fd55)
 	assert_reg(r4, 0)
+	assert_reg(r5, -1)
-- 
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