From 8c06c97c81339f68e06ff465aac2d8b1f2da4e27 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Tue, 13 Dec 2022 23:21:32 -0600 Subject: Implement interrupt emulation --- tb/sim/irq.S | 44 ++++++++++++++++++++++++++++++++++++++++++++ tb/sim/irq.py | 4 ++++ 2 files changed, 48 insertions(+) create mode 100644 tb/sim/irq.S create mode 100644 tb/sim/irq.py (limited to 'tb/sim') diff --git a/tb/sim/irq.S b/tb/sim/irq.S new file mode 100644 index 0000000..35ce2c9 --- /dev/null +++ b/tb/sim/irq.S @@ -0,0 +1,44 @@ +.global reset +reset: + # Stop and reset timer + ldr r2, =0x30020000 + mov r1, #(1 << 3) + str r1, [r2, #4] + mov r1, #0 + str r1, [r2, #0] + + # Enable timer interrupts + ldr r3, =0x30070000 + ldr r1, =(1 << 0) + str r1, [r3, #4] + + # Enable IRQs + mov r0, #0 + mrs r1, cpsr + and r1, #~(1 << 7) + msr cpsr_c, r1 + + # Program timer with timeout value of 128 cycles + mov r1, #4 + str r1, [r2, #8] + mov r1, #0 + str r1, [r2, #12] + + # Start timer + mov r1, #(1 << 0 | 1 << 2) + str r1, [r2, #4] + + .wfi: + tst r0, r0 + beq .wfi + + mov r2, #2 + mov pc, lr + +.global irq +irq: + mov r0, #1 + ldr r1, [r2, #0] + mov r4, #0 + str r4, [r2, #0] + subs pc, lr, #4 diff --git a/tb/sim/irq.py b/tb/sim/irq.py new file mode 100644 index 0000000..9691e4c --- /dev/null +++ b/tb/sim/irq.py @@ -0,0 +1,4 @@ +def final(): + assert_reg(r0, 1) + assert_reg(r1, 0b01) + assert_reg(r2, 2) -- cgit v1.2.3