From d006be2e89aa493237f212811ee880ed8b54241b Mon Sep 17 00:00:00 2001
From: Alejandro Soto <alejandro@34project.org>
Date: Sun, 11 Dec 2022 17:28:03 -0600
Subject: Implement MMU access checks

---
 tb/sim/paging.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'tb/sim/paging.py')

diff --git a/tb/sim/paging.py b/tb/sim/paging.py
index 2249be0..e687051 100644
--- a/tb/sim/paging.py
+++ b/tb/sim/paging.py
@@ -4,5 +4,5 @@ def final():
     assert_reg(r0, 0x01234567)
     assert_reg(r1, 0x89abcdef)
     assert_reg(r2, 0x89abcde0)
-    assert_reg(r3, 0)
+    assert_reg(r3, 0b0101) # Section translation fault, p. 720
     assert_reg(r4, read_reg(r5))
-- 
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