From 61bf2100fbd5e0a5f4bd1f013d70d8027604bbba Mon Sep 17 00:00:00 2001 From: JulianCamacho Date: Thu, 17 Nov 2022 08:16:14 -0600 Subject: Bug fixes --- tb/platform.sv | 2 ++ 1 file changed, 2 insertions(+) (limited to 'tb/platform.sv') diff --git a/tb/platform.sv b/tb/platform.sv index 1e708cc..2dade78 100644 --- a/tb/platform.sv +++ b/tb/platform.sv @@ -28,6 +28,8 @@ module platform output wire memory_mem_dm, // .mem_dm input wire memory_oct_rzqin, // .oct_rzqin output wire [7:0] pio_0_external_connection_export, // pio_0_external_connection.export + input wire [7:0] switches_external_connection_export, // pio_1_external_connection.export + input wire [7:0] buttons_external_connection_export, // pio_2_external_connection.export input wire pll_0_reset_reset, output wire sys_sdram_pll_0_sdram_clk_clk, input wire reset_reset_n /*verilator public*/,// reset.reset_n -- cgit v1.2.3