From a7adc0af074826a4c68c7395d2abfd4b931955df Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Wed, 7 Dec 2022 20:04:15 -0600 Subject: Make the cycle limit optional --- sim/gdbstub.py | 1 + sim/sim.py | 7 +++++-- 2 files changed, 6 insertions(+), 2 deletions(-) (limited to 'sim') diff --git a/sim/gdbstub.py b/sim/gdbstub.py index 75c15cb..c01a4a7 100644 --- a/sim/gdbstub.py +++ b/sim/gdbstub.py @@ -1,5 +1,6 @@ import sys, socket +cycles = None start_halted = True def init(): diff --git a/sim/sim.py b/sim/sim.py index be846fb..b0a194a 100755 --- a/sim/sim.py +++ b/sim/sim.py @@ -275,13 +275,16 @@ prelude.update({k: v for k, v in all_regs}) module.__dict__.update(prelude) spec.loader.exec_module(module) -cycles = module_get('cycles', 1024) mem_dumps = module_get('mem_dumps', []) if init := module_get('init'): init() -exec_args = [verilated, '--headless', '--no-tty', '--cycles', str(cycles), '--dump-regs'] +exec_args = [verilated, '--headless', '--no-tty', '--dump-regs'] + +cycles = module_get('cycles', 1024) +if cycles is not None: + exec_args.extend(['--cycles', str(cycles)]) for rng in mem_dumps: length = rng.stop - rng.start -- cgit v1.2.3