From 87c73314d7ce0062b13ae14f376ec50a4653fb18 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sun, 16 Oct 2022 18:20:45 -0600 Subject: Implement register dumps --- rtl/core/regs/file.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'rtl') diff --git a/rtl/core/regs/file.sv b/rtl/core/regs/file.sv index a296f5e..7109edf 100644 --- a/rtl/core/regs/file.sv +++ b/rtl/core/regs/file.sv @@ -12,7 +12,7 @@ module core_reg_file ); // Ver comentario en uarch.sv - word file[30]; + word file[30] /*verilator public*/; always_ff @(posedge clk) begin if(wr_enable) -- cgit v1.2.3