From 2910a4dfc7e27169628b6b30232067c3c1508fff Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Fabi=C3=A1n=20Montero?= <fabian@cluster451.org>
Date: Wed, 19 Oct 2022 23:13:24 -0600
Subject: =?UTF-8?q?mul:=20a=C3=B1ade=20base=20para=20instrucci=C3=B3n=20MU?=
 =?UTF-8?q?L?=
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---
 rtl/core/mul/mul.sv | 60 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)
 create mode 100644 rtl/core/mul/mul.sv

(limited to 'rtl')

diff --git a/rtl/core/mul/mul.sv b/rtl/core/mul/mul.sv
new file mode 100644
index 0000000..0453cad
--- /dev/null
+++ b/rtl/core/mul/mul.sv
@@ -0,0 +1,60 @@
+module core_mul_mul
+#(parameter W=32)
+(
+	input   logic[W - 1:0]      a,
+                                b,
+    input   logic               clk,
+
+	output  logic[(W*2) - 1:0]  q,
+	output  logic               z,
+                                n
+);
+
+    logic[(W*2):0] booth;
+    logic[1:0] Q; 
+    logic[W-1:0] A, B;
+    logic[W - 1:0] counter;
+
+    initial begin
+        booth = { W{1'b0}, b, 0 }
+        Q = booth[1:0];
+        A = booth[(W*2):W];
+        B = a;
+        counter = W;
+    end
+
+always@(posedge clk or negedge rst_n) begin
+    if (~rst_n) begin
+        booth = { W{1'b0}, b, 0 }
+        Q = booth[1:0];
+        //A = booth[(W*2):W];
+        //B = a;
+        counter = W;
+    end 
+    else begin
+
+        A = booth[(W*2):W];
+
+        unique case(Q)
+            2'b01:
+                booth[(W*2):W] = A + B;
+                
+
+            2'b10:
+                booth[(W*2):W] = A - B;    
+            
+            // 2'b11 o 2'b00:
+            default: ;
+                
+        endcase
+
+        booth >>> 1;
+        counter = counter - 1;
+    end
+
+    always_comb
+        if(counter == 0) begin
+            q = booth[(W*2):1]
+        end
+    end
+endmodule
-- 
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