From 231f84b20e168afe36067b93bf30ed5e83f8e464 Mon Sep 17 00:00:00 2001
From: Alejandro Soto <alejandro@34project.org>
Date: Sun, 25 Sep 2022 17:47:26 -0600
Subject: Implement ALU opcode decoding

---
 rtl/core/decode/data.sv   | 83 +++++++++--------------------------------------
 rtl/core/decode/decode.sv |  8 +++--
 2 files changed, 21 insertions(+), 70 deletions(-)

(limited to 'rtl')

diff --git a/rtl/core/decode/data.sv b/rtl/core/decode/data.sv
index 67c118c..51370be 100644
--- a/rtl/core/decode/data.sv
+++ b/rtl/core/decode/data.sv
@@ -4,85 +4,32 @@
 
 module core_decode_data
 (
-	input  word      insn,
-	input  psr_flags flags,
-
-	output alu_op    op,
-	output reg_num   rn,
-	                 rd,
-	output logic     writeback,
-	                 update_flags,
-	                 restore_spsr,
-	                 zero_fst,
-	                 negate_fst,
-	                 negate_snd,
-	                 carry_in
+	input  word    insn,
+
+	output alu_op  op,
+	output reg_num rn,
+	               rd,
+	output logic   writeback,
+	               update_flags,
+	               restore_spsr
 );
 
 	assign rn = insn `FIELD_DATA_RN;
 	assign rd = insn `FIELD_DATA_RD;
+	assign op = insn `FIELD_DATA_OPCODE;
 
 	always_comb begin
-		update_flags = insn `FIELD_DATA_S;
-		writeback = 1;
-
-		op = ALU_ADD;
-		zero_fst = 0;
-		negate_fst = 0;
-		negate_snd = 0;
-		carry_in = 0;
-
-		unique case(insn `FIELD_DATA_OPCODE)
-			`DATA_ADD: ;
-
-			`DATA_AND: op = ALU_AND;
-			`DATA_EOR: op = ALU_XOR;
-			`DATA_ORR: op = ALU_ORR;
-			`DATA_SUB: negate_snd = 1;
-			`DATA_RSB: negate_fst = 1;
-			`DATA_ADC: carry_in = flags.c;
-			`DATA_MOV: zero_fst = 1;
-			`DATA_CMN: writeback = 0;
-
-			`DATA_MVN: begin
-				zero_fst = 1;
-				negate_snd = 1;
-			end
-
-			`DATA_SBC: begin
-				negate_snd = 1;
-				carry_in = flags.c;
-			end
-
-			`DATA_RSC: begin
-				negate_fst = 1;
-				carry_in = flags.c;
-			end
-
-			`DATA_BIC: begin
-				op = ALU_AND;
-				negate_snd = 1;
-				carry_in = 1;
-			end
-
-			`DATA_TST: begin
-				op = ALU_AND;
-				writeback = 0;
-			end
-
-			`DATA_TEQ: begin
-				op = ALU_XOR;
+		unique case(op)
+			`ALU_CMP, `ALU_CMN, `ALU_TST, `ALU_TEQ:
 				writeback = 0;
-			end
-
-			`DATA_CMP: begin
-				writeback = 0;
-				negate_snd = 1;
-			end
 
+			default:
+				writeback = 1;
 		endcase
 
+		update_flags = insn `FIELD_DATA_S;
 		restore_spsr = (rd == `R15) & update_flags;
+
 		if(restore_spsr)
 			update_flags = 0;
 	end
diff --git a/rtl/core/decode/decode.sv b/rtl/core/decode/decode.sv
index f173529..57744e1 100644
--- a/rtl/core/decode/decode.sv
+++ b/rtl/core/decode/decode.sv
@@ -12,7 +12,8 @@ module core_decode
 	                 writeback,
 	                 branch,
 	output ptr       branch_offset,
-	output reg_num   rd
+	output reg_num   rd,
+	output alu_op    data_op
 );
 
 	logic cond_undefined;
@@ -35,15 +36,16 @@ module core_decode
 	);
 
 	//TODO
-	alu_op op;
 	reg_num rn;
 	logic update_flags, restore_spsr, zero_fst, negate_fst, negate_snd, carry_in;
 
 	logic data_writeback;
 	reg_num data_rd;
+	alu_op data_group_op;
 
 	core_decode_data group_data
 	(
+		.op(data_group_op),
 		.rd(data_rd),
 		.writeback(data_writeback),
 		.*
@@ -55,6 +57,7 @@ module core_decode
 		branch = 0;
 		writeback = 0;
 		rd = 4'bxxxx;
+		data_op = 4'bxxxx;
 
 		priority case(insn `FIELD_OP) inside
 			`GROUP_B: begin
@@ -69,6 +72,7 @@ module core_decode
 			`GROUP_ALU: begin
 				rd = data_rd;
 				writeback = data_writeback;
+				data_op = data_group_op;
 			end
 
 			`INSN_MUL: ;
-- 
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