From b21c321a059e11edeece1c90d97776bb0716d7a0 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Thu, 16 May 2024 01:08:04 -0600 Subject: rtl: fix quartus errors: parser, synthesis, fitter --- rtl/wb2axip/axiperf.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'rtl/wb2axip/axiperf.v') diff --git a/rtl/wb2axip/axiperf.v b/rtl/wb2axip/axiperf.v index f2498e6..920599b 100644 --- a/rtl/wb2axip/axiperf.v +++ b/rtl/wb2axip/axiperf.v @@ -334,7 +334,7 @@ // //////////////////////////////////////////////////////////////////////////////// // -`default_nettype none +//`default_nettype none // }}} module axiperf #( // {{{ @@ -343,7 +343,7 @@ module axiperf #( // is fixed at a width of 32-bits by Xilinx def'n, and 2) since // we only ever have 4 configuration words. parameter C_AXIL_ADDR_WIDTH = 7, - localparam C_AXIL_DATA_WIDTH = 32, + /*local*/parameter C_AXIL_DATA_WIDTH = 32, parameter C_AXI_DATA_WIDTH = 32, parameter C_AXI_ADDR_WIDTH = 32, parameter C_AXI_ID_WIDTH = 4, -- cgit v1.2.3