From b21c321a059e11edeece1c90d97776bb0716d7a0 Mon Sep 17 00:00:00 2001
From: Alejandro Soto <alejandro@34project.org>
Date: Thu, 16 May 2024 01:08:04 -0600
Subject: rtl: fix quartus errors: parser, synthesis, fitter

---
 rtl/wb2axip/aximwr2wbsp.v | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'rtl/wb2axip/aximwr2wbsp.v')

diff --git a/rtl/wb2axip/aximwr2wbsp.v b/rtl/wb2axip/aximwr2wbsp.v
index 074467c..820f004 100644
--- a/rtl/wb2axip/aximwr2wbsp.v
+++ b/rtl/wb2axip/aximwr2wbsp.v
@@ -32,7 +32,7 @@
 ////////////////////////////////////////////////////////////////////////////////
 //
 //
-`default_nettype	none
+//`default_nettype	none
 // }}}
 module aximwr2wbsp #(
 		// {{{
@@ -40,8 +40,8 @@ module aximwr2wbsp #(
 		parameter C_AXI_DATA_WIDTH	= 32,
 		parameter C_AXI_ADDR_WIDTH	= 28,
 		parameter [0:0] OPT_SWAP_ENDIANNESS = 1'b0,
-		localparam AXI_LSBS		= $clog2(C_AXI_DATA_WIDTH)-3,
-		localparam AW			= C_AXI_ADDR_WIDTH-AXI_LSBS,
+		/*local*/parameter AXI_LSBS		= $clog2(C_AXI_DATA_WIDTH)-3,
+		/*local*/parameter AW			= C_AXI_ADDR_WIDTH-AXI_LSBS,
 
 		parameter LGFIFO                =  5
 		// }}}
-- 
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