From b21c321a059e11edeece1c90d97776bb0716d7a0 Mon Sep 17 00:00:00 2001
From: Alejandro Soto <alejandro@34project.org>
Date: Thu, 16 May 2024 01:08:04 -0600
Subject: rtl: fix quartus errors: parser, synthesis, fitter

---
 rtl/wb2axip/axi3reorder.v | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'rtl/wb2axip/axi3reorder.v')

diff --git a/rtl/wb2axip/axi3reorder.v b/rtl/wb2axip/axi3reorder.v
index 3c92c0d..a644749 100644
--- a/rtl/wb2axip/axi3reorder.v
+++ b/rtl/wb2axip/axi3reorder.v
@@ -80,7 +80,7 @@
 ////////////////////////////////////////////////////////////////////////////////
 //
 //
-`default_nettype	none
+//`default_nettype	none
 // }}}
 module	axi3reorder #(
 		// {{{
@@ -293,7 +293,7 @@ module	axi3reorder #(
 		//
 
 		for (gk = 0; gk<NSREG; gk=gk+1)
-		begin
+		begin: genblock_a
 
 			// sr_advance
 			// {{{
@@ -510,7 +510,7 @@ module	axi3reorder #(
 		// Every write beat goes into a separate FIFO based on its ID
 		//
 		for (gk=0; gk < NUM_FIFOS; gk=gk+1)
-		begin
+		begin: genblock_b
 		// {{{
 			wire	[LGWFIFO:0]	wbfifo_fill;
 
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