From f786c0f2f6f00cab2203de4a672801ca9c179415 Mon Sep 17 00:00:00 2001
From: Alejandro Soto <alejandro@34project.org>
Date: Fri, 6 Oct 2023 16:41:15 -0600
Subject: tb: rename smp_sim to test_smp

---
 rtl/top/smp_sim.sv  | 36 ------------------------------------
 rtl/top/test_smp.sv | 36 ++++++++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 36 deletions(-)
 delete mode 100644 rtl/top/smp_sim.sv
 create mode 100644 rtl/top/test_smp.sv

(limited to 'rtl/top')

diff --git a/rtl/top/smp_sim.sv b/rtl/top/smp_sim.sv
deleted file mode 100644
index ff4d8a1..0000000
--- a/rtl/top/smp_sim.sv
+++ /dev/null
@@ -1,36 +0,0 @@
-module smp_sim
-(
-	input  logic	   clk,
-	                   rst_n,
-
-	input  logic       avl_address, // No se usa, pero cocotb_bus lo requiere
-	                   avl_read,
-	                   avl_write,
-	input  logic[31:0] avl_writedata,
-	output logic[31:0] avl_readdata,
-
-	input logic        cpu_halted_0,
-	                   cpu_halted_1,
-	                   cpu_halted_2,
-	                   cpu_halted_3,
-	input logic        breakpoint_0,
-	                   breakpoint_1,
-	                   breakpoint_2,
-	                   breakpoint_3,	
-
-	output logic       halt_0,
-	                   halt_1,
-	                   halt_2,
-	                   halt_3,
-	                   step_0,
-	                   step_1,
-	                   step_2,
-	                   step_3
-);
-
-	smp_ctrl dut
-	(
-		.*
-	);
-
-endmodule
diff --git a/rtl/top/test_smp.sv b/rtl/top/test_smp.sv
new file mode 100644
index 0000000..df417c3
--- /dev/null
+++ b/rtl/top/test_smp.sv
@@ -0,0 +1,36 @@
+module test_smp
+(
+	input  logic	   clk,
+	                   rst_n,
+
+	input  logic       avl_address, // No se usa, pero cocotb_bus lo requiere
+	                   avl_read,
+	                   avl_write,
+	input  logic[31:0] avl_writedata,
+	output logic[31:0] avl_readdata,
+
+	input logic        cpu_halted_0,
+	                   cpu_halted_1,
+	                   cpu_halted_2,
+	                   cpu_halted_3,
+	input logic        breakpoint_0,
+	                   breakpoint_1,
+	                   breakpoint_2,
+	                   breakpoint_3,	
+
+	output logic       halt_0,
+	                   halt_1,
+	                   halt_2,
+	                   halt_3,
+	                   step_0,
+	                   step_1,
+	                   step_2,
+	                   step_3
+);
+
+	smp_ctrl dut
+	(
+		.*
+	);
+
+endmodule
-- 
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