From 6c175d5dc428f630e3bd4caf707db4b77b0b87e7 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Mon, 12 Feb 2024 16:20:12 -0600 Subject: rtl, tb: add core.mk files --- rtl/smp/smp_ctrl.sv | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'rtl/smp/smp_ctrl.sv') diff --git a/rtl/smp/smp_ctrl.sv b/rtl/smp/smp_ctrl.sv index 2bf812e..b9f3106 100644 --- a/rtl/smp/smp_ctrl.sv +++ b/rtl/smp/smp_ctrl.sv @@ -31,6 +31,10 @@ module smp_ctrl step_3 ); +`ifdef VERILATOR + logic avl_address /*verilator public*/; +`endif + logic write; logic[7:0] readdata_3, readdata_2, readdata_1, readdata_0, writedata_3, writedata_2, writedata_1, writedata_0; -- cgit v1.2.3