From a7d92072c0bdc3a3e1c99de64f353e932846bc2a Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sat, 4 May 2024 14:19:48 -0600 Subject: rtl/pkt_switch: replace axi_timer example with pkt_switch --- rtl/pkt_switch/axi_bus.sv | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 rtl/pkt_switch/axi_bus.sv (limited to 'rtl/pkt_switch/axi_bus.sv') diff --git a/rtl/pkt_switch/axi_bus.sv b/rtl/pkt_switch/axi_bus.sv new file mode 100644 index 0000000..f1460ca --- /dev/null +++ b/rtl/pkt_switch/axi_bus.sv @@ -0,0 +1,28 @@ +//AXI interface bus +interface axi_bus #( + parameter int unsigned AXI_ADDR_WIDTH = 32, + parameter int unsigned AXI_DATA_WIDTH = 32 + ); + + logic [AXI_ADDR_WIDTH-1:0] ADDR; + logic AVALID; + logic AREADY; + logic AWRITE; + logic WVALID; + logic WREADY; + logic [AXI_DATA_WIDTH-1:0] WDATA; + logic RVALID; + logic RREADY; + logic [AXI_DATA_WIDTH-1:0] RDATA; + + modport Master( + input AREADY, WREADY, RVALID, RDATA, + output ADDR, AVALID, AWRITE, WVALID, WDATA, RREADY + ); + + modport Slave( + input ADDR, AVALID, AWRITE, WVALID, WDATA, RREADY, + output AREADY, WREADY, RVALID, RDATA + ); + +endinterface -- cgit v1.2.3