From faea27c352b078410e4b2eed9063b6e5833f6af3 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Mon, 6 May 2024 16:51:17 -0600 Subject: rtl/if_common: add id, resp, size, strb signals to if_axib --- rtl/gfx/gfx_shader_front.sv | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) (limited to 'rtl/gfx') diff --git a/rtl/gfx/gfx_shader_front.sv b/rtl/gfx/gfx_shader_front.sv index 0a2b8b8..3398e52 100644 --- a/rtl/gfx/gfx_shader_front.sv +++ b/rtl/gfx/gfx_shader_front.sv @@ -122,14 +122,23 @@ import gfx::*; group_id groups[BIND_STAGES]; icache_line_tag araddr, request_addr; - assign mem.bready = 0; - assign mem.wvalid = 0; - assign mem.awvalid = 0; - + assign mem.arid = '0; assign mem.arlen = ($bits(mem.arlen))'($bits(oword) / $bits(word) - 1); + assign mem.arsize = 3'b101; // 32 bits/beat assign mem.araddr = {araddr, ($clog2($bits(oword)) - $clog2($bits(word)) + SUBWORD_BITS)'('0)}; assign mem.arburst = 2'b01; // Incremental mode + assign mem.awid = '0; + assign mem.awlen = mem.arlen; + assign mem.awsize = mem.arsize; + assign mem.awburst = mem.arburst; + assign mem.awvalid = 0; + + assign mem.wstrb = '0; + assign mem.wvalid = 0; + + assign mem.bready = 0; + assign runnable_in.tx.data = loop_group; assign runnable_in.tx.valid = loop_valid; -- cgit v1.2.3