From 152a3970fc3d0d55823840cf45edcf84c5b471fd Mon Sep 17 00:00:00 2001
From: Alejandro Soto <alejandro@34project.org>
Date: Fri, 10 Nov 2023 17:53:40 -0600
Subject: rtl/gfx: implement fragment mask clear

---
 rtl/gfx/gfx_clear.sv | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 70 insertions(+)
 create mode 100644 rtl/gfx/gfx_clear.sv

(limited to 'rtl/gfx/gfx_clear.sv')

diff --git a/rtl/gfx/gfx_clear.sv b/rtl/gfx/gfx_clear.sv
new file mode 100644
index 0000000..ae9a20c
--- /dev/null
+++ b/rtl/gfx/gfx_clear.sv
@@ -0,0 +1,70 @@
+`include "gfx/gfx_defs.sv"
+
+module gfx_clear
+(
+	input  logic        clk,
+	                    rst_n,
+
+	input  logic        start_clear,
+
+	input  linear_coord rop_mask_addr,
+	input  logic        rop_mask_assert,
+	output logic        frag_wait,
+
+	output logic        frag_mask_set,
+	                    frag_mask_write,
+	output linear_coord frag_mask_write_addr
+);
+
+	enum int unsigned
+	{
+		FRAG,
+		CLEAR
+	} state;
+
+	logic end_clear;
+
+	assign end_clear = frag_mask_write_addr == `GFX_LINEAR_RES - 1;
+
+	always_comb
+		unique case (state)
+			FRAG:  frag_wait = start_clear;
+			CLEAR: frag_wait = 1;
+		endcase
+
+	always_ff @(posedge clk or negedge rst_n)
+		if (!rst_n) begin
+			state <= FRAG;
+			frag_mask_write <= 0;
+		end else unique case (state)
+			FRAG: begin
+				frag_mask_write <= rop_mask_assert;
+
+				if (start_clear) begin
+					state <= CLEAR;
+					frag_mask_write <= 1;
+				end
+			end
+
+			CLEAR:
+				if (end_clear) begin
+					state <= FRAG;
+					frag_mask_write <= 0;
+				end
+		endcase
+
+	always_ff @(posedge clk)
+		unique case (state)
+			FRAG: begin
+				frag_mask_set <= !start_clear;
+				frag_mask_write_addr <= rop_mask_addr;
+
+				if (start_clear)
+					frag_mask_write_addr <= 0;
+			end
+
+			CLEAR:
+				frag_mask_write_addr <= frag_mask_write_addr + 1;
+		endcase
+
+endmodule
-- 
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