From 8c06c97c81339f68e06ff465aac2d8b1f2da4e27 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Tue, 13 Dec 2022 23:21:32 -0600 Subject: Implement interrupt emulation --- rtl/core/control/exception.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'rtl/core') diff --git a/rtl/core/control/exception.sv b/rtl/core/control/exception.sv index 76abc5c..02560a6 100644 --- a/rtl/core/control/exception.sv +++ b/rtl/core/control/exception.sv @@ -35,8 +35,8 @@ module core_control_exception exception_mode <= 0; exception_offset_pc <= 0; end begin - if(issue) - pending_irq <= irq && !intmask.i; + if(next_cycle.issue) + pending_irq <= issue && irq && !intmask.i; // A2.6.10 Exception priorities if(mem_fault) begin -- cgit v1.2.3