From 469e29b90ebc248a3b69aa82a36aabaa14d936f2 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sun, 23 Oct 2022 19:11:51 -0600 Subject: Fix ldm writeback --- rtl/core/control/control.sv | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'rtl/core') diff --git a/rtl/core/control/control.sv b/rtl/core/control/control.sv index 95d3bb9..c2484ef 100644 --- a/rtl/core/control/control.sv +++ b/rtl/core/control/control.sv @@ -238,9 +238,10 @@ module core_control mem_offset <= alu_b; end + writeback <= mem_ready && !mem_write; if(mem_ready) begin + rd <= final_rd; wr_value <= mem_data_rd; - writeback <= !mem_write; end if(cycle != TRANSFER || mem_ready) begin @@ -249,8 +250,8 @@ module core_control saved_base <= q_alu; if(pop_valid) begin - rd <= popped; rb <= popped; + final_rd <= popped; end else rb <= final_rd; // Viene de dec_ldst.rd end -- cgit v1.2.3