From 2cbccf921bf84665c55cea67b81f31c66dde4249 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Thu, 8 Dec 2022 19:30:32 -0600 Subject: Fix decoding of msr with immediate operand --- rtl/core/decode/isa.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'rtl/core') diff --git a/rtl/core/decode/isa.sv b/rtl/core/decode/isa.sv index 4c9f316..2ad5b40 100644 --- a/rtl/core/decode/isa.sv +++ b/rtl/core/decode/isa.sv @@ -195,7 +195,7 @@ `define INSN_MSR_IMM 28'b0_0_1_1_0_?_1_0_????_1111_????_???????? `define INSN_MSR_REG 28'b0_0_0_1_0_?_1_0_????_1111_0000_0000_???? -`define GROUP_MSR 28'b0_0_?_1_0_?_1_0_????_1111_0000_0000_???? +`define GROUP_MSR `INSN_MSR_IMM, `INSN_MSR_REG `define FIELD_MRS_R [22] `define FIELD_MRS_RD [15:12] -- cgit v1.2.3