From 43829e0400f0a7aaccbb1ebefb44a38c41749e77 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sun, 25 Sep 2022 23:21:32 -0600 Subject: Implement shifter decoding --- rtl/core/uarch.sv | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'rtl/core/uarch.sv') diff --git a/rtl/core/uarch.sv b/rtl/core/uarch.sv index 07b479d..c4dd961 100644 --- a/rtl/core/uarch.sv +++ b/rtl/core/uarch.sv @@ -56,4 +56,22 @@ typedef logic[4:0] psr_mode; `define MODE_UND 5'b11011 `define MODE_SYS 5'b11111 +typedef struct packed +{ + alu_op op; + reg_num rn, + rd, + r_snd, + r_shift; + logic snd_shift_by_reg, + snd_is_imm, + shl, + shr, + ror, + put_carry, + sign_extend; + logic[7:0] imm; + logic[5:0] shift_imm; +} alu_decode; + `endif -- cgit v1.2.3