From ec7649eef16c7f9c3ca4b74a1cea95eb2f524b29 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Tue, 27 Sep 2022 15:16:07 -0600 Subject: Fix branching bugs --- rtl/core/regs/file.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'rtl/core/regs/file.sv') diff --git a/rtl/core/regs/file.sv b/rtl/core/regs/file.sv index e2bcc09..b2dd634 100644 --- a/rtl/core/regs/file.sv +++ b/rtl/core/regs/file.sv @@ -18,9 +18,9 @@ module core_reg_file assign rd_value = overwrite_hold ? wr_value_hold : q; - always @(posedge clk) begin + always @(negedge clk) begin if(wr_enable) begin - file[rd_index] <= wr_value; + file[wr_index] <= wr_value; wr_value_hold <= wr_value; end -- cgit v1.2.3