From acca3eb31a051f335c51306786bb972c21634998 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Thu, 10 Nov 2022 10:11:33 -0600 Subject: Fix reset glitches --- rtl/core/mmu/mmu.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'rtl/core/mmu') diff --git a/rtl/core/mmu/mmu.sv b/rtl/core/mmu/mmu.sv index 185fb6b..cfb223f 100644 --- a/rtl/core/mmu/mmu.sv +++ b/rtl/core/mmu/mmu.sv @@ -97,15 +97,15 @@ module core_mmu if(hold_free) unique case(next_master) INSN: begin - hold_start <= data_start; hold_addr <= data_addr; + hold_start <= data_start; hold_write <= data_write; hold_data_wr <= data_data_wr; end DATA: begin - hold_start <= insn_start; hold_addr <= insn_addr; + hold_start <= insn_start; hold_write <= 0; end endcase -- cgit v1.2.3