From 7d95ff01bcd8c42efe118fd1bddaabfca0e937eb Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sun, 9 Oct 2022 19:25:27 -0600 Subject: Implement most memory transactions --- rtl/core/isa.sv | 3 +++ 1 file changed, 3 insertions(+) (limited to 'rtl/core/isa.sv') diff --git a/rtl/core/isa.sv b/rtl/core/isa.sv index 7298b9a..c98cfd9 100644 --- a/rtl/core/isa.sv +++ b/rtl/core/isa.sv @@ -118,8 +118,10 @@ `define INSN_STM_CUR 28'b100_?_?_0_?_0_????_???????????????? `define INSN_STM_USR 28'b100_?_?_1_0_0_????_???????????????? +`define GROUP_LDST_SINGLE 28'b01_?_?_?_?_?_?_????_????_???????????? `define GROUP_LDST_SINGLE_IMM 28'b01_0_?_?_?_?_?_????_????_???????????? `define GROUP_LDST_SINGLE_REG 28'b01_1_?_?_?_?_?_????_????_?????_??_0_???? +`define GROUP_LDST_MISC 28'b000_?_?_?_?_?_????_????_????_1_?_?_1_???? `define GROUP_LDST_MISC_IMM 28'b000_?_?_1_?_?_????_????_????_1_?_?_1_???? `define GROUP_LDST_MISC_REG 28'b000_?_?_0_?_?_????_????_0000_1_?_?_1_???? `define GROUP_LDST_MULT 28'b100_?_?_?_?_?_????_???????????????? @@ -135,6 +137,7 @@ `define FIELD_LDST_MISC_P [24] `define FIELD_LDST_MISC_U [23] +`define FIELD_LDST_MISC_REG [22] `define FIELD_LDST_MISC_W [21] `define FIELD_LDST_MISC_RN [19:16] `define FIELD_LDST_MISC_RD [15:12] -- cgit v1.2.3