From 5d798386c3b1c1dc45a2fbc382c9367ccc27c524 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Wed, 9 Nov 2022 09:25:48 -0600 Subject: Implement reset --- rtl/core/fetch/fetch.sv | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'rtl/core/fetch/fetch.sv') diff --git a/rtl/core/fetch/fetch.sv b/rtl/core/fetch/fetch.sv index bb52443..dc97909 100644 --- a/rtl/core/fetch/fetch.sv +++ b/rtl/core/fetch/fetch.sv @@ -4,6 +4,7 @@ module core_fetch #(parameter PREFETCH_ORDER=2) ( input logic clk, + rst_n, stall, branch, fetched, @@ -49,14 +50,13 @@ module core_fetch addr = hold_addr; end - always_ff @(posedge clk) begin - discard <= discard ? !fetched : flush && fetch; - hold_addr <= addr; - end - - initial begin - discard = 0; - hold_addr = 0; - end + always_ff @(posedge clk or negedge rst_n) + if(!rst_n) begin + discard <= 0; + hold_addr <= 0; + end else begin + discard <= discard ? !fetched : flush && fetch; + hold_addr <= addr; + end endmodule -- cgit v1.2.3