From 33e4434a0cb4ad7f15178a013296fb2fa740112e Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Fri, 23 Sep 2022 23:40:09 -0600 Subject: Implement initial fetch stage --- rtl/core/fetch/fetch.sv | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 rtl/core/fetch/fetch.sv (limited to 'rtl/core/fetch/fetch.sv') diff --git a/rtl/core/fetch/fetch.sv b/rtl/core/fetch/fetch.sv new file mode 100644 index 0000000..9b21dd2 --- /dev/null +++ b/rtl/core/fetch/fetch.sv @@ -0,0 +1,35 @@ +`include "core/uarch.sv" + +module core_fetch +#(parameter PREFETCH_ORDER=2) +( + input logic clk, + stall, + flush, + fetched, + input logic[31:0] fetch_data, + + output logic fetch, + output logic[31:0] insn, + output logic[29:0] insn_pc, + addr +); + + logic[29:0] next_pc; + + core_prefetch #(.ORDER(PREFETCH_ORDER)) prefetch + ( + .* + ); + + always_ff @(posedge clk) + if(flush) + addr <= next_pc; + else if(fetched) + addr <= addr + 1; + + initial begin + addr = 0; + end + +endmodule -- cgit v1.2.3