From 735c804c8e8e4bdcbe27c2e8ff74d609d7f45846 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Tue, 1 Nov 2022 21:00:50 -0600 Subject: Implement coprocessor instruction decode --- rtl/core/decode/isa.sv | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'rtl/core/decode/isa.sv') diff --git a/rtl/core/decode/isa.sv b/rtl/core/decode/isa.sv index 3d978a9..e69d79f 100644 --- a/rtl/core/decode/isa.sv +++ b/rtl/core/decode/isa.sv @@ -167,12 +167,12 @@ `define FIELD_SWP_RD [15:12] `define FIELD_SWP_RM [3:0] -// Instrucciones de coprocesador +// Instrucciones de coprocesador, solo definido para CP15 -`define INSN_MCR 28'b1110_???_0_????_????_????_???_1_???? -`define INSN_MRC 28'b1110_???_1_????_????_????_???_1_???? +`define INSN_MCR 28'b1110_???_0_????_????_1111_???_1_???? +`define INSN_MRC 28'b1110_???_1_????_????_1111_???_1_???? -`define GROUP_CP 28'b1110_???_?_????_????_????_???_1_???? +`define GROUP_CP 28'b1110_???_?_????_????_1111_???_1_???? `define FIELD_CP_OPCODE [23:21] `define FIELD_CP_LOAD [20] -- cgit v1.2.3