From dec51abad98cfdee3e0262ff667a53f510c33360 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Mon, 26 Sep 2022 10:28:18 -0600 Subject: Fix shifter addressing modes --- rtl/core/decode/data.sv | 2 ++ 1 file changed, 2 insertions(+) (limited to 'rtl/core/decode/data.sv') diff --git a/rtl/core/decode/data.sv b/rtl/core/decode/data.sv index 89b9967..4dc51a4 100644 --- a/rtl/core/decode/data.sv +++ b/rtl/core/decode/data.sv @@ -30,6 +30,8 @@ module core_decode_data assign decode.ror = ror; assign decode.put_carry = put_carry; assign decode.sign_extend = sign_extend; + assign decode.imm = imm; + assign decode.shift_imm = shift_imm; assign rn = insn `FIELD_DATA_RN; assign rd = insn `FIELD_DATA_RD; -- cgit v1.2.3