From d006be2e89aa493237f212811ee880ed8b54241b Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sun, 11 Dec 2022 17:28:03 -0600 Subject: Implement MMU access checks --- rtl/core/cp15/domain.sv | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'rtl/core/cp15/domain.sv') diff --git a/rtl/core/cp15/domain.sv b/rtl/core/cp15/domain.sv index 4e5f5d6..92112be 100644 --- a/rtl/core/cp15/domain.sv +++ b/rtl/core/cp15/domain.sv @@ -9,16 +9,16 @@ module core_cp15_domain transfer, input word write, - output word read + output word read, + mmu_dac ); - word dac; - assign read = dac; + assign read = mmu_dac; always @(posedge clk or negedge rst_n) if(!rst_n) - dac <= 0; + mmu_dac <= 0; else if(transfer && !load) - dac <= write; + mmu_dac <= write; endmodule -- cgit v1.2.3