From c14209fa2a72d62e06a5480b3652fe4680978349 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Tue, 1 Nov 2022 21:50:18 -0600 Subject: Add the cp15 subsystem --- rtl/core/control/control.sv | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'rtl/core/control') diff --git a/rtl/core/control/control.sv b/rtl/core/control/control.sv index 4169986..fe70a3c 100644 --- a/rtl/core/control/control.sv +++ b/rtl/core/control/control.sv @@ -50,7 +50,8 @@ module core_control mul, mul_add, mul_long, - mul_signed + mul_signed, + coproc ); logic final_writeback, final_update_flags, ldst, ldst_pre, ldst_increment, @@ -156,6 +157,8 @@ module core_control mul_long <= dec_mul.long_mul; mul_signed <= dec_mul.signed_mul; + coproc <= dec.coproc; + mem_regs <= dec_ldst.regs; mem_write <= !dec_ldst.load; -- cgit v1.2.3