From 6e6e7a1add425af55f2f64f84cc312c231f9db45 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sun, 6 Nov 2022 15:51:39 -0600 Subject: Move CP15 logic out of control.sv --- rtl/core/control/control.sv | 14 ++++++-------- rtl/core/control/coproc.sv | 22 ++++++++++++++++++++++ 2 files changed, 28 insertions(+), 8 deletions(-) create mode 100644 rtl/core/control/coproc.sv (limited to 'rtl/core/control') diff --git a/rtl/core/control/control.sv b/rtl/core/control/control.sv index 49c1e8b..e8a1a69 100644 --- a/rtl/core/control/control.sv +++ b/rtl/core/control/control.sv @@ -126,15 +126,13 @@ module core_control .* ); - always_ff @(posedge clk) begin - wb_alu_flags <= alu_flags; + core_control_coproc ctrl_cp + ( + .* + ); - unique0 case(next_cycle) - ISSUE: - if(issue) - coproc <= dec.coproc; - endcase - end + always_ff @(posedge clk) + wb_alu_flags <= alu_flags; initial wb_alu_flags = 4'b0000; diff --git a/rtl/core/control/coproc.sv b/rtl/core/control/coproc.sv new file mode 100644 index 0000000..f0b4169 --- /dev/null +++ b/rtl/core/control/coproc.sv @@ -0,0 +1,22 @@ +`include "core/uarch.sv" + +module core_control_coproc +( + input logic clk, + + input datapath_decode dec, + + input ctrl_cycle next_cycle, + input logic issue, + + output logic coproc +); + + always_ff @(posedge clk) + if(next_cycle == ISSUE && issue) + coproc <= dec.coproc; + + initial + coproc = 0; + +endmodule -- cgit v1.2.3