From ff71bcd0c5425c168f111b8f4a92d0a90a6c9c31 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sun, 11 Dec 2022 14:48:08 -0600 Subject: Implement data aborts --- rtl/core/control/writeback.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'rtl/core/control/writeback.sv') diff --git a/rtl/core/control/writeback.sv b/rtl/core/control/writeback.sv index 3bacb75..a7738fb 100644 --- a/rtl/core/control/writeback.sv +++ b/rtl/core/control/writeback.sv @@ -17,7 +17,7 @@ module core_control_writeback input ctrl_cycle cycle, next_cycle, input word saved_base, - vector, + exception_vector, psr_wb, coproc_wb, input reg_num ra, @@ -81,7 +81,7 @@ module core_control_writeback end else if(next_cycle.base_writeback) wr_value = ldst_read; else if(next_cycle.exception) - wr_value = vector; + wr_value = exception_vector; else if(next_cycle.mul_hi_wb) wr_value = mul_q_hi; -- cgit v1.2.3