From 5d798386c3b1c1dc45a2fbc382c9367ccc27c524 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Wed, 9 Nov 2022 09:25:48 -0600 Subject: Implement reset --- rtl/core/control/ldst/ldst.sv | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) (limited to 'rtl/core/control/ldst/ldst.sv') diff --git a/rtl/core/control/ldst/ldst.sv b/rtl/core/control/ldst/ldst.sv index 2a295c8..baf0054 100644 --- a/rtl/core/control/ldst/ldst.sv +++ b/rtl/core/control/ldst/ldst.sv @@ -3,6 +3,7 @@ module core_control_ldst ( input logic clk, + rst_n, input insn_decode dec, input logic issue, @@ -43,8 +44,19 @@ module core_control_ldst .pop_lower(popped_lower) ); - always_ff @(posedge clk) - unique case(next_cycle) + always_ff @(posedge clk or negedge rst_n) + if(!rst_n) begin + ldst <= 0; + ldst_pre <= 0; + ldst_writeback <= 0; + ldst_increment <= 0; + + mem_addr <= {$bits(mem_addr){1'b0}}; + mem_write <= 0; + mem_start <= 0; + mem_regs <= {$bits(mem_regs){1'b0}}; + mem_offset <= 0; + end else unique case(next_cycle) ISSUE: begin // TODO: dec.ldst.unprivileged/user_regs // TODO: byte/halfword sizes @@ -74,17 +86,4 @@ module core_control_ldst end endcase - initial begin - ldst = 0; - ldst_pre = 0; - ldst_writeback = 0; - ldst_increment = 0; - - mem_addr = {$bits(mem_addr){1'b0}}; - mem_write = 0; - mem_start = 0; - mem_regs = {$bits(mem_regs){1'b0}}; - mem_offset = 0; - end - endmodule -- cgit v1.2.3