From 4ccb96c1aaf348f677954171751b58ad8f4dccf1 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Mon, 7 Nov 2022 19:07:55 -0600 Subject: Remove false dependencies on control.issue (long combinational) --- rtl/core/control/ldst/ldst.sv | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) (limited to 'rtl/core/control/ldst/ldst.sv') diff --git a/rtl/core/control/ldst/ldst.sv b/rtl/core/control/ldst/ldst.sv index 0a2f6c9..c8dac7c 100644 --- a/rtl/core/control/ldst/ldst.sv +++ b/rtl/core/control/ldst/ldst.sv @@ -46,18 +46,19 @@ module core_control_ldst always_ff @(posedge clk) unique case(next_cycle) - ISSUE: - if(issue) begin - // TODO: dec_ldst.unprivileged/user_regs - // TODO: byte/halfword sizes + ISSUE: begin + // TODO: dec_ldst.unprivileged/user_regs + // TODO: byte/halfword sizes + if(issue) ldst <= dec.ldst; - ldst_pre <= dec_ldst.pre_indexed; - ldst_increment <= dec_ldst.increment; - ldst_writeback <= dec_ldst.writeback; - mem_regs <= dec_ldst.regs; - mem_write <= !dec_ldst.load; - end + ldst_pre <= dec_ldst.pre_indexed; + ldst_increment <= dec_ldst.increment; + ldst_writeback <= dec_ldst.writeback; + + mem_regs <= dec_ldst.regs; + mem_write <= !dec_ldst.load; + end TRANSFER: begin if(cycle != TRANSFER) begin -- cgit v1.2.3