From 5d798386c3b1c1dc45a2fbc382c9367ccc27c524 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Wed, 9 Nov 2022 09:25:48 -0600 Subject: Implement reset --- rtl/core/control/exception.sv | 1 + 1 file changed, 1 insertion(+) (limited to 'rtl/core/control/exception.sv') diff --git a/rtl/core/control/exception.sv b/rtl/core/control/exception.sv index 9a64cd5..c4f3772 100644 --- a/rtl/core/control/exception.sv +++ b/rtl/core/control/exception.sv @@ -3,6 +3,7 @@ module core_control_exception ( input logic clk, + rst_n, input logic undefined, -- cgit v1.2.3