From d463acba5f9589085afb3dcc4058d82908ff90f2 Mon Sep 17 00:00:00 2001
From: Alejandro Soto <alejandro@34project.org>
Date: Sun, 13 Nov 2022 05:22:23 -0600
Subject: Convert core state machines to Quartus-inferring RTL

---
 rtl/core/control/coproc.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'rtl/core/control/coproc.sv')

diff --git a/rtl/core/control/coproc.sv b/rtl/core/control/coproc.sv
index a457b0f..76f0a53 100644
--- a/rtl/core/control/coproc.sv
+++ b/rtl/core/control/coproc.sv
@@ -16,7 +16,7 @@ module core_control_coproc
 	always_ff @(posedge clk or negedge rst_n)
 		if(!rst_n)
 			coproc <= 0;
-		else if(next_cycle == ISSUE && issue)
+		else if(next_cycle.issue && issue)
 			coproc <= dec.ctrl.coproc;
 
 endmodule
-- 
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