From d463acba5f9589085afb3dcc4058d82908ff90f2 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sun, 13 Nov 2022 05:22:23 -0600 Subject: Convert core state machines to Quartus-inferring RTL --- rtl/core/control/branch.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'rtl/core/control/branch.sv') diff --git a/rtl/core/control/branch.sv b/rtl/core/control/branch.sv index 96e6e65..0298b95 100644 --- a/rtl/core/control/branch.sv +++ b/rtl/core/control/branch.sv @@ -21,7 +21,7 @@ module core_control_branch branch_target <= {$bits(branch_target){1'b0}}; end else begin branch <= 0; - if(next_cycle == ISSUE && issue) begin + if(next_cycle.issue && issue) begin branch <= dec.ctrl.branch; branch_target <= next_pc_visible + dec.branch.offset; end -- cgit v1.2.3