From 76e734fb944b6c39234611c5e871c0cee427e80a Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sun, 6 Nov 2022 14:19:48 -0600 Subject: Split branch logic out of control.sv --- rtl/core/control/branch.sv | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 rtl/core/control/branch.sv (limited to 'rtl/core/control/branch.sv') diff --git a/rtl/core/control/branch.sv b/rtl/core/control/branch.sv new file mode 100644 index 0000000..3f8160e --- /dev/null +++ b/rtl/core/control/branch.sv @@ -0,0 +1,31 @@ +`include "core/uarch.sv" + +module core_control_branch +( + input logic clk, + + input datapath_decode dec, + input branch_decode dec_branch, + + input ctrl_cycle next_cycle, + input logic issue, + input ptr next_pc_visible, + + output logic branch, + output ptr branch_target +); + + always_ff @(posedge clk) begin + branch <= 0; + if(next_cycle == ISSUE && issue) begin + branch <= dec.branch; + branch_target <= next_pc_visible + dec_branch.offset; + end + end + + initial begin + branch = 1; + branch_target = {$bits(branch_target){1'b0}}; + end + +endmodule -- cgit v1.2.3