From 5079281c8e8889efc2eeba664d93644126006743 Mon Sep 17 00:00:00 2001
From: Alejandro Soto <alejandro@34project.org>
Date: Mon, 17 Oct 2022 01:03:25 -0600
Subject: Fix data hazards in nzcv and PC increment

---
 rtl/core/arm810.sv | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'rtl/core/arm810.sv')

diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv
index c49600f..91f48db 100644
--- a/rtl/core/arm810.sv
+++ b/rtl/core/arm810.sv
@@ -54,6 +54,7 @@ module arm810
 	logic explicit_branch, writeback, update_flags, c_in;
 	ptr branch_target, pc_visible;
 	psr_mode reg_mode;
+	psr_flags wb_alu_flags;
 	alu_op alu_ctrl;
 	shifter_control shifter_ctrl;
 	word alu_a, alu_b, wr_value;
@@ -77,6 +78,7 @@ module arm810
 
 	core_psr psr
 	(
+		.alu_flags(wb_alu_flags),
 		.*
 	);
 
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