From bc98bc905c2e796f0d587719196f7e4bf344510a Mon Sep 17 00:00:00 2001
From: Alejandro Soto <alejandro@34project.org>
Date: Fri, 29 Sep 2023 19:50:01 -0600
Subject: platform: add CPUs and caches to qsys

---
 rtl/cache/defs.sv | 8 ++++++++
 1 file changed, 8 insertions(+)

(limited to 'rtl/cache/defs.sv')

diff --git a/rtl/cache/defs.sv b/rtl/cache/defs.sv
index 6fdb719..bfefb88 100644
--- a/rtl/cache/defs.sv
+++ b/rtl/cache/defs.sv
@@ -38,6 +38,10 @@ typedef enum logic[1:0]
 
 typedef struct packed
 {
+`ifndef VERILATOR
+	// Error: data width (158) must be a multiple of bitsPerSymbol (8)
+	logic[1:0] padding;
+`endif
 	logic[1:0] ttl;
 	logic      read,
 	           inval,
@@ -59,6 +63,10 @@ typedef struct packed
 
 typedef struct packed
 {
+`ifndef VERILATOR
+	// Error: data width (78) must be a multiple of bitsPerSymbol (8)
+	logic[1:0] padding;
+`endif
 	token_lock e2, e1, e0;
 } ring_token;
 
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