From 70d7dc9489f4d5b91d8138e0a341eec4ad7f15b0 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Mon, 2 Oct 2023 01:46:44 -0600 Subject: rtl: implement exclusive monitor datapath --- rtl/cache/cache.sv | 2 ++ 1 file changed, 2 insertions(+) (limited to 'rtl/cache/cache.sv') diff --git a/rtl/cache/cache.sv b/rtl/cache/cache.sv index e62a326..29403e2 100644 --- a/rtl/cache/cache.sv +++ b/rtl/cache/cache.sv @@ -9,9 +9,11 @@ module cache input ptr core_address, input logic core_read, core_write, + core_lock, input word core_writedata, input word_be core_byteenable, output logic core_waitrequest, + output logic[1:0] core_response, output word core_readdata, //TODO -- cgit v1.2.3