From bd5f7ec56e966855bc3c878fde3819bafe6f6c1e Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Tue, 21 May 2024 12:29:30 -0600 Subject: rtl/gfx, platform/wavelet3d, target/w3d_de1soc: add system-wide RAM mappings --- platform/wavelet3d/w3d_host_vexriscv.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'platform/wavelet3d/w3d_host_vexriscv.v') diff --git a/platform/wavelet3d/w3d_host_vexriscv.v b/platform/wavelet3d/w3d_host_vexriscv.v index 4ae9e2c..b46c702 100644 --- a/platform/wavelet3d/w3d_host_vexriscv.v +++ b/platform/wavelet3d/w3d_host_vexriscv.v @@ -5451,7 +5451,7 @@ module w3d_host_vexriscv ( assign IBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; assign IBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; assign IBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; - assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = (5'h00 < IBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 27]); + assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = (6'h07 <= IBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 26]); assign IBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; assign IBusCachedPlugin_mmuBus_rsp_exception = 1'b0; assign IBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; @@ -5460,7 +5460,7 @@ module w3d_host_vexriscv ( assign DBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; assign DBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; assign DBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; - assign DBusCachedPlugin_mmuBus_rsp_isIoAccess = (5'h00 < DBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 27]); + assign DBusCachedPlugin_mmuBus_rsp_isIoAccess = (6'h07 <= DBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 26]); assign DBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; assign DBusCachedPlugin_mmuBus_rsp_exception = 1'b0; assign DBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; -- cgit v1.2.3